Project · April 2026 · working

FPGA calculator

A VHDL calculator on a Basys 2, evaluating two-stage arithmetic expressions with results on a seven-segment display.

VHDLFPGADigital designFSMCoursework

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Coursework for DTU 30081. Three operands and two operators are entered using the board’s switches and buttons.

Entering and evaluating an expression on the Basys 2.

The challenge

Division required a custom, multi-cycle shift-and-subtract unit. A control state machine and debounced buttons kept the input sequence predictable.

Results

Code, design files & full documentation →

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